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SAN JOSE, Calif.--(BUSINESS WIRE)--June 12, 2001--Altera Corporation (Nasdaq:ALTR) today introduced its LogicLock(TM) incremental design methodology enabled by the Quartus® II development software. The LogicLock design flow optimizes any hierarchical design and improves the flow for designs integrating intellectual property (IP) cores or utilizing team-based approaches to dramatically accelerate system-on-a programmable-chip (SOPC) development cycles. This enhanced methodology shortens design time by significantly reducing the number of design iterations.

``Anyone designing with IP cores, such as the Nios(TM) soft processor core, or leveraging multi-clock domain design requirements is looking for a way to preserve block-level performance throughout design iterations,'' said David Greenfield, Altera director of tools marketing. ``Unlike alternative approaches, the LogicLock incremental design methodology puts control of place-and-route in the hands of the customer.''

Altera's proprietary LogicLock incremental design methodology is a key component of its Quartus II version 1.1 design software, which includes support for the APEX(TM) II programmable logic device (PLD) family. Altera will demonstrate the software at the Design Automation Conference next week in Las Vegas (booth number 2700).

The LogicLock feature allows designers to preserve fMAX performance at the block level, an essential part of a true hierarchical design methodology that is ideal for both IP design and team-based design. Designers can now optimize performance for each design block, lock in the performance, and know that timing constraints will be met after additional design blocks are integrated to complete the system.

Without a true hierarchical design methodology, designers must spend time re-optimizing their designs for performance each time a large or small iteration is made to improve functionality or correct an error. The LogicLock methodology significantly improves a designer's productivity by locking in the performance. LogicLock incremental design enables the use of both fixed and floating regions with multiple levels of hierarchy during the floor planning portion of the hardware design process. Constraints tied to each region guarantee that the performance of a given region will be preserved when changes are made elsewhere in the design. These constraints enable better placement and provide the potential to elevate design performance.

About Quartus II Design Software

Altera's Quartus II software delivers superior designer productivity and supports system-level designs with features including the PowerFit(TM) fitter technology, support for multi-million gate devices, and integration with third party tools. Quartus II software extends the user's scope beyond hardware by including a software workflow that offers C/C++ compilers and debuggers in a fully integrated development environment to support Altera's Excalibur(TM) embedded processor solutions. The Quartus II software supports major operating systems, including Windows 2000, Windows NT, Windows 98, Sun Solaris, and HP-UX. In May, Altera announced plans to port the Quartus II design software to Linux-based environments by offering support for the Red Hat operating system.

Pricing and Availability

Quartus II version 1.1 software will ship to all customers on active subscription in July. Altera's software subscription program simplifies the process of obtaining Altera development tools by consolidating all software products and maintenance charges into one annual subscription payment. The annual subscription for the Altera development tools is $2,000 for a node-locked PC license, which includes full-featured Quartus II and MAX+PLUS® II development software, OEM synthesis tools from Exemplar, OEM simulation tools from ModelTechnology, and 12 months of software upgrades. New or existing customers may obtain a software subscription at the Programmable eStore on the Altera web site, http://www.altera.com, or from Altera distributors worldwide.

About Altera

Altera Corporation, The Programmable Solutions Company®, was founded in 1983 and is a leading supplier of programmable logic devices (PLDs). Altera's CMOS-based PLDs are user-programmable semiconductor chips that enhance flexibility and reduce time-to-market for companies in the communications, computer peripheral, and industrial markets. By using high performance devices, software development tools, and sophisticated intellectual property cores, system-on-a-programmable-chip (SOPC) solutions can be created with embedded processors, memory, and other complex logic together on a single PLD. Altera common stock is traded on The Nasdaq Stock Market under the symbol ALTR. More information on Altera is available on the Internet at http://www.altera.com.

Safe Harbor

This press release contains ``forward-looking statements'' that are made pursuant to the safe harbor provisions of the Private Securities Litigation Reform Act of 1995. Forward-looking statements are generally preceded by words that imply a future state such as ``expected'' or that imply that a particular future event or events will occur such as ``will''. Investors are cautioned that all forward-looking statements in this release involve risks and uncertainty, including without limitation the risk that future performance is dependent on product development schedules, the design performance of software and other tools, as well as the company's and third parties' development technology and manufacture capabilities. Please refer to the company's Securities and Exchange Commission filings, copies of which are available from the company without charge.

Note to Editors: Altera, The Programmable Solutions Company, LogicLock, Quartus, APEX, PowerFit, Excalibur, MAX+PLUS, and specific device designations, are trademarks and/or service marks of Altera Corporation in the U.S. and other countries. All other trademarks are property of their respective holder.

     Altera Corporation
     Bruce Fienberg, 408/544-6866
     bfienber@altera.com
        or
     PR21
     Matthew Stotts, 415/369-8117
     matthew.stotts@pr21.com